Goyatek Technology Standardized on Mentor Graphics Design-for-Test Tools

WILSONVILLE, Ore.--(BUSINESS WIRE)--Dec. 18, 2002--Mentor Graphics Corporation (Nasdaq:MENT) today announced that Goyatek Technology Inc. (also known as Goya) has standardized on its Design-for-Test (DFT) tools for their DFT service flow.

Mentor's MBISTArchitect memory built-in self-test (BIST) tool and BSD Architect(TM) boundary scan automation tool were selected for their technology leadership and for ongoing improvement of Goya's DFT capabilities.

Goya is a provider of Taiwan Semiconductor Manufacturing Company (TSMC)-based SoC/ASIC turnkey services and intellectual property (IP) and is known for its outstanding engineering capabilities supporting TSMC's advanced process technology. Goya is the first TSMC design services partner to support and complete both 0.18 micron and 0.25 micron designs. Because of their work with these complex design process technologies, coupled with the varied design flows used by their customers, Goya requires DFT tools that provide superior test coverage, flexibility and innovative at-speed testing capabilities to ensure high test and, ultimately, end-product quality.

"Our work with complex design processes as well as IP requires that we use the most advanced tools and test techniques available," said Nai-Yin Sung, CAD Director of Goya. "Mentor Graphics(R) offers the best DFT tools in the industry and fit into any design flow, which is important to us and to our customers. The MBISTArchitect and BSDArchitect tools offer us a comprehensive selection of features that save us time and provide the highest test quality available."

The MBIST Full-Speed(TM) feature within the MBISTArchitect tool accelerates traditional "at-speed" testing by applying a patent-pending pipelining technique to simultaneously apply patterns, read them back and compare the results. This process significantly reduces test application times, facilitates high test set reusability and produces the high quality test. The BSDArchitect tool dramatically reduces development time by automating the implementation of boundary scan circuitry. The tool's flexible test access port (TAP) synthesis engine supports any boundary scan configuration to thoroughly test internal structures such as memory BIST, embedded cores and IP.

"As our customers face more complex design challenges we need to be ready with advanced test solutions that can be used now," said Robert Hum, vice president and general manager, Design Verification and Test group, Mentor Graphics. "The move to nanometer processes introduce problems that are difficult to detect and can have a tremendous impact on yield. By enhancing capabilities such as at-speed test we are able to equip our customers with a competitive advantage."

About Mentor Graphics Design-for-Test Tools

Mentor Graphics provides the industry's broadest portfolio of DFT solutions for today's System-on-Chip and deep submicron designs and includes solutions for ATPG, embedded deterministic test, memory BIST, logic BIST, and boundary scan. Mentor Graphics DFT Centers of Excellence are located worldwide and employ the industry's leading professionals in the research and application of proven DFT solutions. For more information visit www.mentor.com/dft.

About Goyatek Technology Inc.

Goyatek Technology Inc. (also known as Goya), was founded in 1998. Goya provides Automatic Placement & Routing service to TSMC's customers as well as SoC/ASIC turnkey service and intellectual property services.

Goya passed the certification of ISO 9001:2000 in May 2001. Through an alliance with MOSIS, a leading MPW service partner, Goya provides stable, reliable and cost-effective MPW solutions. Goya provides various digital & mixed-signal IP design services, such as special I/O, high-speed I/O, ADC/DAC, PLL, etc. Goya also has broad experience in SoC (System on Chip) physical integration.

With IP service and DFT solution services, Goya assist clients in SoC design and integration. Goya focuses on services based on TSMC's foundry, offering advance services in line with TSMC's advance process technologies. Goya concentrates on leading the service technology industry, offering best-in-class service and becoming a "Virtual Design Team."

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,700 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics is a registered trademark and BSDArchitect, MBISTArchitect and MBIST Full-Speed are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

CONTACT: Mentor Graphics
             Leanne White, 503/685-1984
             leannewhite@mentor.com
             or
             Weber Shandwick
             Haley Luz, 503/552-3726
             hluz@webershandwick.com